Functional Safety Engineering Manager
9:00 Functional Safety applied to Semiconductors: overview of techniques and challenges for the mitigation of random hardware failures
When referring to Functional Safety applied to Semiconductors for automotive applications, usually the first solutions coming in mind to address random faults are those with highest effectiveness, e.g. like CPU lock-step, ECC, Logic BIST, etc.
More commonly, those well -understood solutions are just one part of the story when one wants to address complex SoC’s: in fact, often less conceptually “simple” techniques and methodologies need to be adopted when faced with real-world constraints like silicon area and power consumption that prevents the duplication of all the logic. This calls for the development of SW based self-tests, adoption of assumptions of use, thorough analysis of fault propagation, uneven distribution of diagnostic coverage and other practical solutions. In this talk we will go through those solutions, see the relation to each other and to an SoC development average constraints.